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general description the max8620y micro-power-management integratedcircuit (?mic) powers low-voltage microprocessors or dsps in portable devices. the ?mic includes a high- efficiency step-down dc-dc converter, two low- dropout linear regulators (ldos), a microprocessor reset output, and power-on/off control logic. this device maintains high efficiency at light loads with a low 115? supply current, and its miniature tdfn package makes it ideal for portable devices. the max8620y? step-down dc-dc converter utilizes a proprietary 4mhz hysteretic-pwm control scheme that allows for ultra-small external components. internal syn- chronous rectification improves efficiency and elimi- nates the external schottky diode that is required in conventional step-down converters. the output voltage is adjustable from 0.6v to 3.3v, with guaranteed output current up to 500ma. the max8620y? two ldos offer low 45? rms output noise and a low dropout of only 200mv at 200ma. eachldo delivers at least 300ma of continuous output cur- rent. the output voltages are pin selectable from 1.8v to 3.3v for flexibility. a microprocessor reset output ( reset ) monitors out1 and warns the system of impending power loss allow-ing safe shutdown. reset asserts during power-up, power-down, shutdown, and fault conditions wherev out1 is below its regulation voltage. applications cellular handsetssmart phones/pda phones pdas wireless lan microprocessor and dsp solutions including msm, xscale, arm, and omap features ? three regulators and a reset in one package ? high-efficiency step-down converter up to 4mhz fixed switching frequency500ma guaranteed output current 0.6v to 3.3v adjustable output voltage 2% initial accuracy fast voltage-positioning transient response internal synchronous rectifier ? two 300ma ldo regulators 200mv dropout at 200ma loadlow 45v rms output noise 3% accuracy over line, load, and temperatureovercurrent protection nine pin-selectable output-voltage settings ? 30ms (min) reset output flag ? 2.7v to 5.5v input ? 115a (typ) supply current at no load ? thermal-overload protection ? tiny 3mm x 3mm x 0.8mm tdfn package max8620y pmic for microprocessors or dsps in portable equipment ________________________________________________________________ maxim integrated products 1 ordering information max8620y out1 v in v logic 100k ? reset out2 lxfb gnd in2bp hf_pwrpwr_on sel1 reset sel2 en2 in1 1.80v, 2.60v, 2.80v, 2.85v, 3.00v, or 3.30v* 300ma 1.80v, 2.50v, 2.60v, 2.85v, or 3.00v* 300ma out3 0.6v to 3.3v 500ma *use sel1 and sel2 to set v out1 and v out2 part temp range pin-package top mark MAX8620YETD -40? to +85? 14 tdfn-ep(t1433-2) aab typical operating circuit 19-3564; rev 0; 1/05 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. msm is a trademark of qualcomm, inc.xscale is a trademark of intel corp. arm is a trademark of arm limited. omap is a trademark of texas instruments, inc. evaluation kit available pin configuration appears at end of data sheet. downloaded from: http:///
max8620y pmic for microprocessors or dsps in portable equipment 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics(v in1 = v in2 = +3.7v, c in = 10?, c bp = 0.01?, t a = -40? to +85?, unless otherwise noted. typical values are at t a = +25?.) (note 1) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. in1, in2, pwr_on, reset , en2 , sel1, sel2, hf_pwr, fb, bp to gnd ..................................-0.3v to +6.0v out1, out2 to gnd .................................-0.3v to (v in1 + 0.3v) lx current ......................................................................1.5a rms continuous power dissipation (t a = +70?) 14-pin tdfn (derate 18.2mw/? above +70?) .......1454mw operating temperature range ...........................-40? to +85? junction temperature ......................................................+150? storage temperature range .............................-65? to +150? lead temperature (soldering, 10s) .................................+300? parameter symbol conditions min typ max units supply voltage range v in1 2.7 5.5 v shutdown supply current i shdn v in1 = v in2 = 4.2v, pwr_on = hf_pwr = gnd 5.5 10 ? all outputs enabled, no load 115 140 supply current i in1 + i in2 v out1 = v out3 = 1.8v, i out1 = i out3 = 500?, out2 disabled 430 ? undervoltage lockout v in1 = v in2 rising 2.70 2.85 3.05 uvlo threshold v uvlo v in1 = v in2 falling 2.35 v thermal protection thermal-shutdown threshold temperature rising +160 ? thermal-shutdown hysteresis 15 ? reference (bp) reference bypass outputvoltage v bp 0 i bp 1? 1.231 1.250 1.269 v logic and control inputs (pwr_on, hf_pwr, en2 ) pwr_on, hf_pwr, en2 input low voltage v il v in1 = v in2 = 2.7v to 4.2v (note 2) 0.4 v pwr_on, hf_pwr, en2 input high voltage v ih v in1 = v in2 = 2.7v to 4.2v (note 2) 1.44 v input bias current i inb v pwr_on = v hf_pwr = v en2 = 0v or 5.5v -1 +1 ? hf_pwr timer t hf from the rising edge of hf_pwr until theone-shot timer expires (figure 4) 1.05 1.31 1.46 s linear regulators (out1, out2) 0? to +85? -1.3 +1.8 i load = 1ma, 3.7v v in 5.5v -40? to +85? -1.5 +1.8 1ma i load 300ma -1.2 out1, out2 output-voltageaccuracy v out1 , v out2 i load = 150ma 0 % out1, out2 output current i out_ 300 ma out1, out2 output current limit i lim_ v out_ = 0v 310 550 940 ma out1, out2 dropout voltage v do i load = 200ma, t a = +85? (note 3) 200 380 mv downloaded from: http:///
max8620y pmic for microprocessors or dsps in portable equipment _______________________________________________________________________________________ 3 parameter symbol conditions min typ max units out1, out2 power-supplyrejection ratio f = 10hz to 10khz, c out_ = 4.7?, i load_ = 30ma 60 db f = 100hz to 100khz, c out_ = 4.7?, i load_ = 30ma 45 output noise voltage f = 100hz to 100khz, c out_ = 4.7?, i load_ = 30ma, c bp open 100 ? rms step-down converter (out3) output voltage range v out3 0.6 3.3 v fb threshold voltage v th v fb falling 0.6 v fb threshold line regulation v in1 = v in2 = 2.7v to 5.5v (note 2) 0.08 %/v t a = +25? -2 +2 fb threshold voltage accuracy(falling) (% of v th ) i out3 = 0ma t a = -40? to +85? -3 +3 % fb threshold voltage hysteresis (% of v th ) v hys 2% out3 disabled 10 fb bias current i fb v fb = 0.5v 10 ? i lim3p pfet switch 675 950 1200 current limit i lim3n nfet rectifier 875 1000 1200 ma r onp pfet switch, i lx = -200ma 0.65 1.5 on-resistance r onn nfet rectifier, i lx = +200ma 0.35 0.8 ? rectifier-off current threshold i lxoff 30 60 ma t on 107 minimum on- and off-times t off 95 ns open-drain, active-low reset output ( reset ) reset output-voltage low v ol i sink = 500? 0.3 v reset output leakage current v reset = 5.5v 100 na reset threshold voltage v thr percent of the out1 regulation voltage(note 4) 84 87 90 % reset timeout period t rp figure 4 30 60 ms ldo output-voltage select inputs (sel1, sel2) sel_ input low threshold 1v sel_ input high threshold v in_ - 0.2v v sel_ input bias current v in1 = v in2 = 4.2v, v sel1 = 0v or v in1 , v sel2 = 0v or v in1 ?.1 ? electrical characteristics (continued)(v in1 = v in2 = +3.7v, c in = 10?, c bp = 0.01?, t a = -40? to +85?, unless otherwise noted. typical values are at t a = +25?.) (note 1) note 1: specifications are 100% production tested at t a = +25?. maximum and minimum limits over temperature are guaranteed by design and characterization. note 2: after startup. note 3: guaranteed by design. note 4: reset asserts low when v out1 drops below the specified percent of the out1 regulation voltage. downloaded from: http:///
max8620y pmic for microprocessors or dsps in portable equipment 4 _______________________________________________________________________________________ typical operating characteristics (v in1 = v in2 = 3.7v, pwr_on = in1, l = 2.2? (lqh31cn2r2m53), c ff = 150pf, v out1 = v out2 = 2.6v, v out3 = 1.867v (r1 = 150k ? , r2 = 75k ? ), c in = 10?, c bp = 0.01?, c out1 = c out2 = 4.7?, c out3 = 2.2?, reset pulled up with 100k ? to out1, t a = +25?, unless otherwise noted.) efficiency vs. load current max8620y toc01 load current (ma) efficiency (%) 100 10 1 10 20 30 40 50 60 70 80 90 100 0 0.1 1000 l = 4.7 h l = 2.2 h l = 1.0 h input quiescent current vs. input voltage max8620y toc02 input voltage (v) quiescent current ( a) 5.0 4.5 3.5 4.0 3.0 2.5 20 40 60 80 100 120 140 160 180 0 2.0 5.5 switching frequency vs. load current switching frequency (mhz) 450 400 350 300 250 200 150 100 50 1 10 0.1 0 500 max8620y toc03 load current (ma) l = 4.7 h l = 2.2 h l = 1.0 h efficiency vs. output voltage output voltage (v) efficiency (%) 2.4 2.2 0.8 1.0 1.2 1.6 1.8 1.4 2.0 65 70 75 80 85 90 95 100 60 0.6 2.6 max8620y toc04 l = 4.7 h l = 2.2 h l = 1.0 h light-load switching waveforms max8620y toc05 200ns/div i l v out ac-coupled 2v/div20mv/div 100ma/div v lx heavy-load switching waveforms max8620y toc06 200ns/div i l v out ac-coupled 2v/div20mv/div 200ma/div v lx downloaded from: http:///
max8620y pmic for microprocessors or dsps in portable equipment _______________________________________________________________________________________ 5 typical operating characteristics (continued) (v in1 = v in2 = 3.7v, pwr_on = in1, l = 2.2? (lqh31cn2r2m53), c ff = 150pf, v out1 = v out2 = 2.6v, v out3 = 1.867v (r1 = 150k ? , r2 = 75k ? ), c in = 10?, c bp = 0.01?, c out1 = c out2 = 4.7?, c out3 = 2.2?, reset pulled up with 100k ? to out1, t a = +25?, unless otherwise noted.) load transient (50ma to 300ma) max8620y toc07 2 s/div i l i load v out3 ac-coupled 50mv/div200ma/div 300ma 50ma 200ma/div power-up waveforms max8620y toc08 40 s/div v out3 v out1 v out2 v in 2v/div1v/div 1v/div 1v/div pwr_on startup/shutdown waveforms max8620y toc09 100 s/div v out3 v out1 v out2 v pwr_on 2v/div1v/div 1v/div1v/div reset waveforms max8620y toc10 10ms/div v out1 v pwr_on 2v/div1v/div 1v/div v reset out2 shutdown waveforms max8620y toc11 200 s/div v out2 v en2 1v/div1v/div hf_pwr startup waveforms max8620y toc12 10ms/div v out1 v hf_pwr 1v/div 2v/div1v/div v reset downloaded from: http:///
max8620y pmic for microprocessors or dsps in portable equipment 6 _______________________________________________________________________________________ out1/out2 voltage vs. input voltage max8620y toc13 input voltage (v) output voltage (v) 5.0 4.5 4.0 3.5 2.35 2.40 2.45 2.50 2.55 2.60 2.65 2.70 2.75 2.802.30 3.0 5.5 i load = 0ma i load = 300ma dropout voltage vs. load current load current (ma) dropout voltage (mv) 250 200 50 100 150 50 100 150 200 250 300 350 400 0 0 300 max8620y toc14 v out_ = 3v out1/out2 load regulation vs. load current max8620y toc15 load current (ma) load regulation (%) 250 200 150 100 50 -1.3 -1.1 -0.9 -0.7 -0.5 -0.3 -0.1-1.5 0 300 out1/out2 power-supply ripple rejection vs. frequency max8620y toc16 frequency (khz) power-supply ripple rejection (db) 100 10 1 10 20 30 40 50 60 70 80 0 0.1 1000 typical operating characteristics (continued) (v in1 = v in2 = 3.7v, pwr_on = in1, l = 2.2? (lqh31cn2r2m53), c ff = 150pf, v out1 = v out2 = 2.6v, v out3 = 1.867v (r1 = 150k ? , r2 = 75k ? ), c in = 10?, c bp = 0.01?, c out1 = c out2 = 4.7?, c out3 = 2.2?, reset pulled up with 100k ? to out1, t a = +25?, unless otherwise noted.) downloaded from: http:///
max8620y pmic for microprocessors or dsps in portable equipment _______________________________________________________________________________________ 7 pin description pin name function 1 sel1 ldo output-voltage select input 1. sel1 and sel2 set the out1 and out2 voltages to one of ninecombinations (table 1). 2 sel2 ldo output-voltage select input 2. sel1 and sel2 set the out1 and out2 voltages to one of ninecombinations (table 1). 3 en2 out2 enable input. drive en2 low to enable out2. drive en2 high to disable out2. if the max8620y is placed into shutdown (pwr_on = hf_pwr = low), out2 does not power regardless of the statusof en2 (table 2, figure 4). 4 reset open-drain, active-low reset output. reset asserts low when v out1 drops below 87% (typ) of regulation. reset remains asserted for t rp after v out1 rises above 87% (typ) of regulation. reset also asserts when out1 is disabled (figure 4). reset deasserts if out1 is enabled and v out1 is above 87% of regulation after t rp . 5b p reference bypass capacitor node. bypass bp with a 0.01? capacitor to gnd. bp is highimpedance when the max8620y is disabled (pwr_on = hf_pwr = low). 6 hf_pwr hands-free enable input. drive hf_pwr high or apply a pulse to enable the max8620y. power is enabled for 1.31s (typ) following a rising edge at hf_pwr (table 2, figure 4). 7 pwr_on power-enable input. drive pwr_on high to enable the max8620y (table 2, figure 4). drive pwr_onlow to enter shutdown mode. in shutdown, the lx node is high impedance and both ldos are disabled (depending on the state of hf_pwr). 8f b step-down converter output-voltage feedback input. v fb regulates to 0.6v (typ). connect fb to the center of an external resistor-divider between lx and gnd to set v out3 between 0.6v and 3.3v (see the setting the step-down output voltage (out3) section). 9 gnd ground. connect gnd to the exposed pad. 10 lx inductor connection. lx is internally connected to the drain of the internal p-channel power mosfetand the drain of the n-channel synchronous rectifier. lx is high impedance when out3 is disabled. 11 in2 power input 2. connect in2 to in1 as close to the device as possible. 12 in1 power input 1. connect in1 to in2 as close to the device as possible. bypass in1 to gnd with a 10?ceramic capacitor, as close to the device as possible. 13 out1 300ma ldo output 1. bypass out1 to gnd with a 4.7? ceramic capacitor for 300ma applications,or a 2.2? ceramic capacitor for 150ma applications. out1 is high impedance when disabled. 14 out2 300ma ldo output 2. bypass out2 to gnd with a 4.7? ceramic capacitor for 300ma applications,or a 2.2? ceramic capacitor for 150ma applications. out2 is high impedance when disabled. ep ep exposed pad. connect ep to gnd. downloaded from: http:///
max8620y pmic for microprocessors or dsps in portable equipment 8 _______________________________________________________________________________________ detailed description the max8620y ?mic is designed to power low-core-voltage microprocessors or dsps in portable devices. the ?mic contains a fixed-frequency, high-efficiency step-down converter; two low-dropout regulators (ldos); a 30ms (min) reset timer; and power-on/off control logic (figure 1). step-down dc-dc control scheme the max8620y step-down converter is optimized forhigh-efficiency voltage conversion over a wide load range while maintaining excellent transient response, minimizing external component size, and minimizing output voltage ripple. the dc-dc converter (out3) also features an optimized on-resistance internal mosfet switch and synchronous rectifier to maximize efficiency. the max8620y utilizes a proprietary hys- teretic-pwm control scheme that switches with nearly fixed frequency up to 4mhz, allowing for ultra-smallexternal components. the step-down converter output current is guaranteed up to 500ma. when the step-down converter output voltage falls below the regulation threshold, the error comparator begins a switching cycle by turning the high-side pfet switch on. this switch remains on until the minimum on- time (t on ) expires and the output voltage is in regula- tion or the current-limit threshold (i lim3p ) is exceeded. once off, the high-side switch remains off until the mini-mum off-time (t off ) expires and the output voltage again falls below the regulation threshold. during thisoff period, the low-side synchronous rectifier turns on and remains on until either the high-side switch turns on or the inductor current reduces to the rectifier-off current threshold (i lxoff = 30ma (typ)). the internal synchronous rectifier eliminates the need for an exter-nal schottky diode. fb lx 0.6v step-down converter control pfet nfet ldo1 control ldo2 control out1 out2 reference in1 gnd output- voltage select uvlo control logic one- shot timer pwr_on hf_pwr sel1 sel2 reset en2 bp reset enable r1r2 l v in c in c out3 c out1 r pu c bp c out2 c ff out3 gnd out1out2 en2 reset in2 in1 max8620y figure 1. functional diagram downloaded from: http:///
voltage-positioning load regulation as seen in figure 2, the max8620y uses a unique step- down converter feedback network. by taking feedbackfrom the lx node through r1, the usual phase lag due to the output capacitor is removed, making the loop exceedingly stable and allowing the use of a very small ceramic output capacitor. this configuration causes the output voltage to shift by the inductor series resistance multiplied by the load current. this output-voltage shift is known as voltage-positioning load regulation. voltage-positioning load regulation greatly reduces overshoot during load transients, which effectively halves the peak-to-peak output-voltage excursions compared to traditional step-down converters. see the load-transient response graph in the typical operating characteristics section. two low-dropout, low-quiescent-current, high-accuracylinear regulators supply loads up to 300ma each. the ldo output voltages are set using sel1 and sel2 (see table 1). as shown in figure 3, the ldos include an internal reference, error amplifiers, p-channel pass tran- sistors, internal-programmable voltage-dividers, and an out1 power-good comparator. each error amplifier compares the reference voltage to a feedback voltageand amplifies the difference. if the feedback voltage is lower than the reference voltage, the pass-transistor gate is pulled lower, allowing more current to pass to the outputs and increasing the output voltage. if the feedback voltage is too high, the pass-transistor gate is pulled up, allowing less current to pass to the output. max8620y pmic for microprocessors or dsps in portable equipment _______________________________________________________________________________________ 9 out1 out2 lxfb gnd in1 bp hf_pwr 2.6v300ma 100k ? pwr_on sel1 reset sel2 en2 reset in out3,500ma c out2 4.7 f c out1 4.7 f c out3 2.2 f c in 10 f c bp 0.01 f c ff 150pf dsp or p i/o analogon/off core r1150k ? l 2.2 h li+ cell 2.6v300ma r275k ? power-on key v batt 1m ? in2 max8620y sel1 sel2 out1 out2 in1 in1 3.00v 2.50v in1 open 2.85v 2.85v in1 gnd 3.00v 3.00v open in1 3.30v 2.50v open open 2.80v 2.60v open gnd 3.30v 1.80v gnd in1 2.85v 2.60v gnd open 2.60v 2.60v gnd gnd 1.80v 2.60v figure 2. typical max8620y dsp or ? application table 1. max8620y output-voltage selection downloaded from: http:///
max8620y ldo output-voltage selection (sel1, sel2) as shown in table 1, the ldo output voltages, out1 and out2, are set according to the logic states ofsel1 and sel2. sel1 and sel2 are trilevel inputs: in1, open, and gnd. the input voltage, v in1 , must be a dropout voltage (v do ) greater than the selected out1 and out2 voltages. power-enable input (pwr_on) drive pwr_on low to place the max8620y in power-down mode and reduce supply current to 5.5? (typ). connect pwr_on to in1 = in2 or logic-high to enable the max8620y. en2 enables and disables out2 when pwr_on is high (table 2). out1, out2, and out3 are all disabled when pwr_on is low. hf_pwr can tem- porarily bring the max8620 out of power-down mode when pwr_on is low (see the hf_pwr section). in power-down, the control circuitry, internal-switching p-channel mosfet, and the internal synchronous rectifier (n-channel mosfet) turn off, and lx becomes high impedance. in addition, both ldos are disabled. out2 enable ( en2 ) drive en2 low to enable out2. drive en2 high to dis- able out2. if the max8620y is placed into power-down using pwr_on (pwr_on = low), out2 does not power regardless of the status of en2 (table 2). pmic for microprocessors or dsps in portable equipment 10 ______________________________________________________________________________________ on/off logic 1.25v ref 87% regulation p out1 reset gnd in1 ldo thermal sensor mos driver with i limit mos driver with i limit pok en2 error- amp 2 error- amp 1 p out2 pwr_on hf_pwr bp timer max8620y figure 3. linear-regulator functional diagram downloaded from: http:///
hands-free enable input (hf_pwr) a rising edge at hf_pwr generates an internal one-shot pulse that enables the max8620y for 1.31s (t hf ). if hf_pwr remains high after t hf expires, the max8620y reenters shutdown. during t hf , out3 and out1 are enabled so the microprocessor (?) can initialize andassert a logic-high at pwr_on. out2 enables during t hf if en2 is low. once pwr_on is high, the status of hf_pwr is ignored. if pwr_on remains low after t hf expires, the max8620y reenters shutdown. power-supply sequencing the step-down converter output (out3) always powersup first and powers down last ( figure 4). out1 powers approximately 70? after out3, and out2 powersapproximately 50? after v out1 reaches 87% (typ) of its regulation voltage. when pwr_on goes low, out1 turns off, then out2 turns off, then out3 turns off 50? after pwr_on goes low. max8620y pmic for microprocessors or dsps in portable equipment ______________________________________________________________________________________ 11 hf_pwr pwr_on out3out1 t su2 v thr t su1 t rp t hf out2 reset en2 50 s figure 4. max8620y power-supply sequencing table 2. max8620y power modes pwr_on hf_pwr* en2 out1 and out3 out2 1 x 1 enabled disabled 1 x 0 enabled enabled 0 1 1 enabled disabled 0 1 0 enabled enabled 0 0 x disabled disabled * a rising edge at hf_pwr initiates a 1.31s one-shot timer. the status of hf_pwr shown in table 2 indicates whether the one-shot period has expired as follows:1 = during t hp 0 = t hp has expired downloaded from: http:///
max8620y reset output ( reset ) reset is an open-drain, active-low output that indi- cates the status of out1. reset is typically pulled up through a 100k ? resistor to the system logic voltage. reset asserts at power-up. the reset timer begins once v out1 reaches 87% of regulation. reset deasserts 60ms after v out1 rises above 87% (typ) of regulation (see the typical operating characteristics ). reset also asserts when out1 is disabled. reference bypass capacitor node (bp) an optional 0.01? bypass capacitor at bp creates alowpass filter for ldo noise reduction. out1 and out2 exhibit 45? rms of output-voltage noise with c bp = 0.01? and c out1 = c out2 = 4.7? . undervoltage lockout v in1 = v in 2 must exceed the 2.85v typical undervolt- age-lockout threshold (v uvlo ) before the max8620y enables out3 to begin power-supply sequencing (seethe power-supply sequencing section). the uvlo threshold hysteresis is typically 0.5v. current limiting the max8620y 300ma ldos limit their output current toi lim_ = 550ma (typ). if the ldo output current exceeds i lim_ , the corresponding ldo output voltage drops. the step-down converter limits i lim3p to 675ma (min). thermal-overload protection thermal-overload protection limits total power dissipa-tion in the max8620y. independent thermal-protection circuits monitor the step-down converter and the linear- regulator circuits. when the max8620y junction temper- ature exceeds t j = +160?, the thermal-overload protection circuit disables the corresponding circuitry,allowing the ic to cool. the thermal-overload protection circuitry enables the max8620y after the junction tem- perature cools by 15?, resulting in a pulsed output dur- ing continuous thermal-overload conditions. thermal- overload protection safeguards the max8620y in the event of fault conditions. for continuous operation, donot exceed the absolute-maximum junction-tempera- ture rating of t j = +150?. applications information power-on closed-loop system when the max8620y is used in conjunction with amicrocontroller, hf_pwr and pwr_on can implement a short-key power-on closed-loop system ( figure 5). the max8620y detects a rising edge at hf_pwr andgenerates an internal 1.31s (typ) one-shot pulse that begins power sequencing and temporarily enables out1, out2, and out3 (depending on the state of en2 ). the 1.31s of power provides time for the proces- sor to initialize and assert a logic-high at pwr_on.once pwr_on is driven high, out3, out1, and out2 (depending on the state of en2 ) remain enabled. if the microcontroller does not drive pwr_on high duringt hf , the max8620y disables out1, out2, and out3, and reenters shutdown. pmic for microprocessors or dsps in portable equipment 12 ______________________________________________________________________________________ pwr_on p power-on key power-hold signal hf_pwr v core v i/o v ana 1m ? pwr hold max8620y figure 5. short-key power-on closed-loop system downloaded from: http:///
if a long-key press is preferred, see figure 6. pwr_on must remain high until a microprocessor asserts a logic-high signal when using this circuit. if a system includes multiple power-on sources, use a diode or configura- tion, as shown in figure 7. setting the step-down output voltage (out3) select a step-down converter output voltage between0.6v and 3.3v by connecting a resistor voltage-divider between lx, fb, and gnd (see figure 2 ) . the fb bias current, i fb , is typically 10na. select r2 so the resistor- divider bias current dominates i fb by a factor of 10. a wide range of resistor values is acceptable, but a goodstarting point is to choose r2 = 100k ? . r1 is given by: where v fb = 0.6v. v out3 can be set between 0.6v and 3.3v, but the step- down converter dropout voltage and inductor voltagedrop impact how close v out3 can be to v in2 . total dropout voltage is a function of the pfet on-resistance,the dcr of the inductor, and the load as follows: for example, with 300ma load: as a result, v in1 = v in2 must exceed the desired v out3 by 210mv to maintain regulation. inductor selection the max8620y step-down converter operates with induc-tors between 1? and 4.7?. low inductance values are physically smaller but require faster switching, which results in some efficiency loss. see the typical operating characteristics section for efficiency and switching fre- quency versus inductor value plots. the inductor? dccurrent rating needs to be only 100ma greater than the application? maximum load current because the max8620y step-down converter features zero-current overshoot during startup and load transients. for output voltages above 2.0v, when light-load effi- ciency is important, the minimum recommended induc- tor is 2.2?. for optimum voltage-positioning load transients, choose an inductor with dc series resis- tance in the 50m ? to 150m ? range (table 3). for high- er efficiency at heavy loads (above 200ma) or minimalload regulation (but some transient overshoot), the resistance should be kept below 100m ? . for light-load applications up to 200ma, much higher resistance isacceptable with very little impact on performance. vm am m v out do 3 300 0 65 50 210 () . =+ () = ?? v i r dcr out do out onp inductor 33 () =+ () rr v v out fb 12 1 3 = ?? ? ?? ? max8620y pmic for microprocessors or dsps in portable equipment ______________________________________________________________________________________ 13 p power-on key power-hold signal pwr_on v core v i/o v ana 1m ? pwr hold max8620y figure 6. long-key power-on closed loop p power-on key power-hold signal hf_pwr pwr_on v core v i/o v ana 1m ? pwr hold max8620y ac adapter hands-free kit figure 7. multiple power-on inputs downloaded from: http:///
max8620y pmic for microprocessors or dsps in portable equipment 14 ______________________________________________________________________________________ table 3. suggested inductors manufacturer series inductance (h) esr ( ? ) current rating (ma) dimensions (mm) lb2012 1.02.2 0.150.23 300240 2.0 x 1.25 x 1.25 = 3.1mm 3 lb2016 1.01.5 2.2 3.3 0.090.11 0.13 0.20 455350 315 280 2.0 x 1.6 x 1.8 = 5.8mm 3 lb2518 1.01.5 2.2 3.3 0.060.07 0.09 0.11 500400 340 270 2.5 x 1.8 x 2.0 = 9mm 3 lbc2518 1.01.5 2.2 3.3 4.7 0.080.11 0.13 0.16 0.20 775660 600 500 430 2.5 x 1.8 x 2.0 = 9mm 3 cb2012 2.24.7 0.230.40 410300 2.0 x 1.25 x 1.25 = 3.1mm 3 cb2016 2.24.7 0.130.25 510340 2.0 x 1.6 x 1.8 = 5.8mm 3 taiyo yuden cb2518 2.24.7 0.090.13 510340 2.5 x 1.8 x 2.0 = 9mm 3 lqh32c_53 1.02.2 4.7 0.060.10 0.15 1000 790650 3.2 x 2.5 x 1.7 = 14mm 3 murata lqm43fn 2.24.7 0.100.17 400300 4.5 x 3.2 x 0.9 = 13mm 3 d310f 1.52.2 3.3 0.130.17 0.19 12301080 1010 3.6 x 3.6 x 1.0 = 13mm 3 toko d312c 1.52.2 2.7 3.3 0.100.12 0.15 0.17 12901140 980900 3.6 x 3.6 x 1.2 = 16mm 3 sumida cdrh2d11 1.52.2 3.3 4.7 0.050.08 0.10 0.14 900780 600 500 3.2 x 3.2 x 1.2 = 12mm 3 downloaded from: http:///
max8620y pmic for microprocessors or dsps in portable equipment ______________________________________________________________________________________ 15 capacitor selection step-down converter output capacitor the output capacitor, c out3 , is required to keep the output voltage ripple small and to ensure regulationloop stability. c out3 must have low impedance at the switching frequency. ceramic capacitors with x5r orx7r dielectric are highly recommended due to their small size, low esr, and small temperature coefficients. due to the unique feedback network, the output capac- itance can be very low. for most applications, a 2.2? capacitor is sufficient. for optimum load-transient per- formance and very low output ripple, the output capaci- tor value in ?s should be equal to or larger than the inductor value in ?s. input capacitor the input capacitor, c in , reduces the current peaks drawn from the battery or input power source andreduces switching noise in the ic. the impedance of c in at the switching frequency should be kept very low. ceramic capacitors with x5r or x7r dielectrics arehighly recommended due to their small size, low esr, and small temperature coefficients. use a 10? ceram- ic capacitor or equivalent amount of multiple capacitors in parallel between in1 and gnd. connect c in as close as possible to the max8620y to minimize theimpact of pc board trace inductance. feed-forward capacitor the feed-forward capacitor, c ff , sets the feedback loop response, controls the switching frequency, and iscritical in obtaining the best efficiency possible. choose a small ceramic c0g (npo) or x7r capacitor with a value given by: where r1 is the resistor between lx and fb (figure 2). select the closest standard value to c ff as possible. ldo output capacitors for applications that require greater than 150ma of out-put current, connect a 4.7? ceramic capacitor between the ldo output and gnd. for applications that require less than 150ma of output current, connect a 2.2? ceramic capacitor between the ldo output and gnd. the ldo output capacitor? (c out_ ) equiva- lent series resistance (esr) affects stability and outputnoise. use output capacitors with an esr of 0.1 ? or less to ensure stability and optimum transient response.surface-mount ceramic capacitors have very low esr and are commonly available in values up to 10?. connect c out as close as possible to the max8620y to minimize the impact of pc board trace inductance. power dissipation and thermal considerations the max8620y total power dissipation, p d , is estimat- ed using the following equations: ` where p in(out3) is the input power for out3, is the step-down converter efficiency, and r dc(inductor) is the inductor? dc resistance.the die junction temperature can be calculated as follows: where ja = 55?/w at +70?. t j should not exceed +150? in normal operating con- ditions. pc board layout and routing high switching frequencies and relatively large peakcurrents make the pc board layout a very important aspect of design. good design minimizes excessive emi on the feedback paths and voltage gradients in the ground plane, both of which can result in instability or regulation errors. connect c in close to in1 and gnd. connect the inductor and output capacitors (c out3 ) as close to the ic as possible and keep the traces short,direct, and wide. the traces between c out3 , c ff , and fb are sensitive to inductor magnetic-field interference. route thesetraces between ground planes or keep the traces away from the inductor. ttp jadj a =+ pp p p pi v v pi v v pp i r d loss out loss out loss out loss out out in out loss out out in out loss out in out out dc () () () ()() ()() () () () =+ + = () = () = ?? ? ?? ? 12 3 11 1 22 2 33 3 2 1 100 ( () inductor c l r s ff = 1 10 downloaded from: http:///
max8620y connect gnd to the ground plane. the external feed-back network should be very close to the fb pin, within 0.2in (5mm). keep noisy traces, such as the lx node, as short as possible. connect gnd to the exposed paddle directly under the ic. figure 8 and the max8620y evaluation kit illustrate examples of pcboard layout and routing schemes. pmic for microprocessors or dsps in portable equipment 16 ______________________________________________________________________________________ sel1 sel1 sel2 sel2 en2 en2 r2 c3 out2out1 c2 c1 c4 out3 gnd in c5 c6 r1 l1 u1 hf_pwr pwr_on reset figure 8. recommended pc board layout chip information transistor count: 4481process: bicmos max8620y 15 4 3 2 sel2 reset 6 9 10 11 12 13 14 sel1 en2 hf_pwr 7 pwr_on bp out1in2 out2in1 gnd 8 fb lx top view 3mm x 3mm x 0.8mm tdfn pin configuration downloaded from: http:///
max8620y pmic for microprocessors or dsps in portable equipment ______________________________________________________________________________________ 17 package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation go to www.maxim-ic.com/packages .) 6, 8, &10l, dfn thin.eps l c l c pin 1 index area d e l e l a e e2 n g 1 2 21-0137 package outline, 6,8,10 & 14l,tdfn, exposed pad, 3x3x0.80 mm -drawing not to scale- k e [(n/2)-1] x e ref. pin 1 id 0.35x0.35 detail a b d2 a2 a1 downloaded from: http:///
max8620y pmic for microprocessors or dsps in portable equipment maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 18 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 2005 maxim integrated products printed usa is a registered trademark of maxim integrated products, inc. package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation go to www.maxim-ic.com/packages .) common dimensions symbol min. max. a 0.70 0.80 d 2.90 3.10 e 2.90 3.10 a1 0.00 0.05 l 0.20 0.40 pkg. code n d2 e2 e jedec spec b [(n/2)-1] x e package variations 0.25 min. k a2 0.20 ref. 2.300.10 1.500.10 6 t633-1 0.95 bsc mo229 / weea 1.90 ref 0.400.05 1.95 ref 0.300.05 0.65 bsc 2.300.10 8 t833-1 2.00 ref 0.250.05 0.50 bsc 2.300.10 10 t1033-1 2.40 ref 0.200.05 - - - - 0.40 bsc 1.700.10 2.300.10 14 t1433-1 1.500.101.500.10 mo229 / weec mo229 / weed-3 0.40 bsc - - - - 0.200.05 2.40 ref t1433-2 14 2.300.10 1.700.10 t633-2 6 1.500.10 2.300.10 0.95 bsc mo229 / weea 0.400.05 1.90 ref t833-2 8 1.500.10 2.300.10 0.65 bsc mo229 / weec 0.300.05 1.95 ref t833-3 8 1.500.10 2.300.10 0.65 bsc mo229 / weec 0.300.05 1.95 ref -drawing not to scale- g 2 2 21-0137 package outline, 6,8,10 & 14l,tdfn, exposed pad, 3x3x0.80 mm downbonds allowed nono no no yes no yes no downloaded from: http:///

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